1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.
2. Description of Related Art
DRAM (Dynamic Random Access Memory) includes a multitude of unit memory cells each made up of one capacitor and one transistor. Reading and writing to the memory cells is effected using word lines that are coupled to the gates of the transistors and bit lines that are coupled to the sources and drains thereof. These devices also include peripheral circuits for selection, reading, and writing.
Semiconductor devices now often include on a common substrate a memory circuit area for DRAM including memory cells and peripheral circuits as described above, as well as a logic circuit area accommodating logic circuits that perform operations other than memory operations. Such devices are sometimes referred to as embedded DRAM or eDRAM, and they can provide large-capacity and high-speed memory on a comparatively small chip. For eDRAM, high speed performance is considered even more important than for general purpose DRAM, because the logic circuitry must be able to operate faster than is normally needed for stand-alone DRAM.
Japanese Kokai No. 2005-044972 describes a memory element having ferroelectric capacitors occupying the same insulating film as multilayer interconnect layers.
Japanese Kokai No. 2000-332216 discloses adding a single layer to the interconnect layer in the peripheral circuit part to reduce a step between the memory part and a peripheral circuit part.
Japanese Kokai No. Heill(1999)-186518 seeks to reduce a resistance at the portion of a contact hole between first and second layer interconnections used for making a high aspect ratio three dimensional capacitor.